AS6C4008-55TIN

Więcej informacji
Do pobrania Download
Main description SRAM Chip Async Single 3V 4M-bit 512K x 8 55ns 32-Pin TSOP-I Tray
SRAM Chip Async Single 3V 4M-bit 512K x 8 55ns 32-Pin TSOP-I Tray

Informacje podstawowe

  • ProducentAlliance Memory
  • EURoHSYes (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 7
  • Inventory 4
  • MaskPart AS6C400855TIN%
  • IntroductionDate Nov 30, 2006

Parametry

  • Address Bus Width (bit) 19
  • Architecture N/R
  • Burst Length (Words) N/R
  • Data Rate Architecture N/R
  • Density (bit) 4M
  • Density in Bits (bit) 4194304
  • Function N/A
  • Maximum Access Time (ns) 55
  • Maximum Clock Rate (MHz) N/R
  • Maximum Operating Current (mA) 60
  • Maximum Operating Supply Voltage (V) 5.5
  • Maximum Operating Temperature (°C) 85
  • Maximum Storage Temperature (°C) 150
  • Minimum Operating Supply Voltage (V) 2.7
  • Minimum Operating Temperature (°C) -40
  • Minimum Storage Temperature (°C) -65
  • Number of Bits per Word (bit) 8
  • Number of I/O Lines (bit) 8
  • Number of Ports 1
  • Number of Words 512K
  • Process Technology CMOS
  • Read Latency (Cycles) N/R
  • Supplier Temperature Grade Industrial
  • Timing Type Asynchronous
  • Typical Operating Supply Voltage (V) 3
Copyright © CBTG technologie - Dystrybucja Komponentów Elektronicznych