AS6C4008-55TIN
| Do pobrania | Download |
|---|---|
| Main description | SRAM Chip Async Single 3V 4M-bit 512K x 8 55ns 32-Pin TSOP-I Tray |
SRAM Chip Async Single 3V 4M-bit 512K x 8 55ns 32-Pin TSOP-I Tray
Informacje podstawowe
- ProducentAlliance Memory
- EURoHSYes (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 7
- Inventory 4
- MaskPart AS6C400855TIN%
- IntroductionDate Nov 30, 2006
Parametry
- Address Bus Width (bit) 19
- Architecture N/R
- Burst Length (Words) N/R
- Data Rate Architecture N/R
- Density (bit) 4M
- Density in Bits (bit) 4194304
- Function N/A
- Maximum Access Time (ns) 55
- Maximum Clock Rate (MHz) N/R
- Maximum Storage Temperature (°C) 150
- Minimum Storage Temperature (°C) -65
- Number of Bits per Word (bit) 8
- Number of I/O Lines (bit) 8
- Number of Ports 1
- Number of Words 512K
- Process Technology CMOS
- Read Latency (Cycles) N/R
- Supplier Temperature Grade Industrial
- Timing Type Asynchronous