XC9536XL-10VQ44I

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Main description CPLD XC9500 Family 800 Gates 36 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 44-Pin VQFP
CPLD XC9500 Family 800 Gates 36 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 44-Pin VQFP

Informacje podstawowe

  • ProducentXilinx
  • EURoHSNo (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 4
  • Inventory 1
  • PCNs 20
  • GIDEP-Alerts 2
  • MaskPart XC9536XL10VQ44I%
  • IntroductionDate May 01, 1996

Parametry

  • Clock Management N/A
  • Copy Protection Yes
  • Data Gate No
  • Device Logic Cells N/A
  • Device System Gates 800
  • Family Name XC9500
  • I/O Voltage (V) 2.5|3.3
  • In-System Programmability Yes
  • Individual Output Enable Control Yes
  • Maximum Clock to Output Delay (ns) 5.8
  • Maximum Internal Frequency (MHz) 111.1
  • Maximum Operating Current (mA) 10(Typ)
  • Maximum Operating Frequency (MHz) 100
  • Maximum Operating Supply Voltage (V) 3.6
  • Maximum Operating Temperature (°C) 85
  • Maximum Propagation Delay Time (ns) 10
  • Maximum Storage Temperature (°C) 150
  • Memory Size (Kbit) N/R
  • Minimum Operating Supply Voltage (V) 3
  • Minimum Operating Temperature (°C) -40
  • Minimum Storage Temperature (°C) -65
  • Number of Flip Flops 36
  • Number of Global Clocks 3
  • Number of I/O Banks N/A
  • Number of Inter Dielectric Layers 4
  • Number of Logic Blocks/Elements 2
  • Number of Macro Cells 36
  • Number of Product Terms per Macro 90
  • Number of User I/Os 34
  • Process Technology 0.35um, CMOS
  • Program Memory Type Flash
  • Programmability Yes
  • Programmable Type In System Programmable
  • RAM Bits (Kbit) N/A
  • Reprogrammability Support No
  • Speed Grade 10
  • Supplier Temperature Grade Industrial
  • Temperature Flag Opr
  • Tolerant Configuration Interface Voltage (V) 5
  • Tradename XC9500
  • Typical Operating Supply Voltage (V) 3.3
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