XC9536-15PCG44C

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Main description CPLD XC9500 Family 800 Gates 36 Macro Cells 55.6MHz 0.5um Technology 5V 44-Pin PLCC
CPLD XC9500 Family 800 Gates 36 Macro Cells 55.6MHz 0.5um Technology 5V 44-Pin PLCC

Informacje podstawowe

  • ProducentXilinx
  • EURoHSYes (2011/65/EU)
  • Automotive Unknown

Informacje dodatkowe

  • Crosses 2
  • Inventory 2
  • PCNs 17
  • MaskPart XC953615PCG44C%
  • IntroductionDate May 01, 1996

Parametry

  • Clock Management N/A
  • Copy Protection Yes
  • Data Gate No
  • Device Logic Cells N/A
  • Device System Gates 800
  • Family Name XC9500
  • I/O Voltage (V) 3.3|5
  • In-System Programmability Yes
  • Individual Output Enable Control Yes
  • Maximum Clock to Output Delay (ns) 8
  • Maximum Internal Frequency (MHz) 95.2
  • Maximum Operating Current (mA) 30(Typ)
  • Maximum Operating Frequency (MHz) 55.6
  • Maximum Operating Supply Voltage (V) 5.25
  • Maximum Operating Temperature (°C) 70
  • Maximum Propagation Delay Time (ns) 15
  • Maximum Storage Temperature (°C) 150
  • Memory Size (Kbit) N/A
  • Minimum Operating Supply Voltage (V) 4.75
  • Minimum Operating Temperature (°C) 0
  • Minimum Storage Temperature (°C) -65
  • Number of Flip Flops 36
  • Number of Global Clocks 3
  • Number of I/O Banks N/A
  • Number of Inter Dielectric Layers 3
  • Number of Logic Blocks/Elements 8
  • Number of Macro Cells 36
  • Number of Product Terms per Macro 90
  • Number of User I/Os 34
  • Process Technology 0.5um
  • Program Memory Type Flash
  • Programmability Yes
  • Programmable Type In System Programmable
  • RAM Bits (Kbit) N/A
  • Reprogrammability Support No
  • Speed Grade 15
  • Supplier Temperature Grade Commercial
  • Temperature Flag Opr
  • Tolerant Configuration Interface Voltage (V) N/A
  • Tradename XC9500
  • Typical Operating Supply Voltage (V) 5
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