XC2C512-10PQG208C
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| Main description | CPLD CoolRunner -II Family 12K Gates 512 Macro Cells 128MHz 0.18um Technology 1.8V 208-Pin PQFP |
CPLD CoolRunner -II Family 12K Gates 512 Macro Cells 128MHz 0.18um Technology 1.8V 208-Pin PQFP
Informacje podstawowe
- ProducentXilinx
- EURoHSYes (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 372
- Inventory 2
- PCNs 18
- MaskPart XC2C51210PQG208C%
- IntroductionDate Sep 26, 2001
Parametry
- Clock Management Doubler/Divider
- Copy Protection No
- Data Gate Yes
- Device Logic Cells N/A
- Device System Gates 12000
- Family Name CoolRunner -II
- I/O Voltage (V) 1.5|1.8|2.5|3.3
- In-System Programmability Yes
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) 7.9
- Maximum Internal Frequency (MHz) 166
- Maximum Propagation Delay Time (ns) 10
- Maximum Storage Temperature (°C) 150
- Memory Size (Kbit) N/R
- Minimum Storage Temperature (°C) -65
- Number of Flip Flops N/A
- Number of Global Clocks 3
- Number of I/O Banks 4
- Number of Inter Dielectric Layers 4/5
- Number of Logic Blocks/Elements 32
- Number of Macro Cells 512
- Number of Product Terms per Macro 40
- Number of User I/Os 173
- Process Technology 0.18um
- Program Memory Type ROMLess
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support No
- Speed Grade 10
- Supplier Temperature Grade Commercial
- Temperature Flag Opr
- Tolerant Configuration Interface Voltage (V) 3.3
- Tradename CoolRunner