CY37384VP208-66NXIT

ProducentCypress SemiconductorEURoHSYes (2011/65/EU, 2015/863)Automotive No.
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CY37384VP208-66NXIT_CYPRESS_SEMICONDUCTOR
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Opis / CY37384VP208-66NXIT

CPLD Ultra37000 Family 11.5K Gates 384 Macro Cells 66MHz 3.3V 208-Pin PQFP T/R

Informacje podstawowe

  • ProducentCypress Semiconductor
  • EURoHSYes (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 258
  • PCNs 25
  • FoundINBOMs 2
  • MaskPart CY37384VP20866NXI%
  • IntroductionDate Jul 07, 2003
  • EnablingEnergyEfficiency No
  • SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY37384VP208-66NXIT

Parametry

  • Clock Management N/A
  • Data Gate No
  • Device Logic Cells N/A
  • Device System Gates 11500
  • Family Name Ultra37000
  • I/O Voltage (V) 3.3|5
  • In-System Programmability Yes
  • Individual Output Enable Control No
  • Maximum Clock to Output Delay (ns) 10
  • Maximum Internal Frequency (MHz) 66
  • Maximum Operating Current (mA) N/A
  • Maximum Operating Frequency (MHz) 66
  • Maximum Operating Supply Voltage (V) 3.6
  • Maximum Operating Temperature (°C) 85
  • Maximum Propagation Delay Time (ns) 20
  • Memory Size (Kbit) N/R
  • Minimum Operating Supply Voltage (V) 3
  • Minimum Operating Temperature (°C) -40
  • Number of Flip Flops N/A
  • Number of Global Clocks 4
  • Number of I/O Banks N/A
  • Number of Inter Dielectric Layers N/A
  • Number of Logic Blocks/Elements 24
  • Number of Macro Cells 384
  • Number of Product Terms per Macro 16
  • Number of User I/Os 165
  • Process Technology N/A
  • Program Memory Type ROMLess
  • Programmability Yes
  • RAM Bits (Kbit) N/A
  • Reprogrammability Support Yes
  • Speed Grade 66
  • Supplier Temperature Grade Industrial
  • Temperature Flag Opr
  • Tolerant Configuration Interface Voltage (V) 5
  • Tradename Ultra37000
  • Typical Operating Supply Voltage (V) 3.3

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Main description CPLD Ultra37000 Family 11.5K Gates 384 Macro Cells 66MHz 3.3V 208-Pin PQFP T/R